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Building a Future-Proof Cloud Infrastructure - Silvano Gai - Bog - Pearson Education (US) - Plusbog.dk

Building a Future-Proof Cloud Infrastructure - Silvano Gai - Bog - Pearson Education (US) - Plusbog.dk

Prepare for the future of cloud infrastructure: Distributed Services Platforms By moving service modules closer to applications, Distributed Services (DS) Platforms will future-proof cloud architectures–improving performance, responsiveness, observability, and troubleshooting. Network pioneer Silvano Gai demonstrates DS Platforms’ remarkable capabilities and guides you through implementing them in diverse hardware. Focusing on business benefits throughout, Gai shows how to provide essential shared services such as segment routing, NAT, firewall, micro-segmentation, load balancing, SSL/TLS termination, VPNs, RDMA, and storage–including storage compression and encryption. He also compares three leading hardware-based approaches–Sea of Processors, FPGAs, and ASICs–preparing you to evaluate solutions, ask the right questions, and plan strategies for your environment. - - Understand the business drivers behind DS Platforms, and the value they offer - - See how modern network design and virtualization create a foundation for DS Platforms - - Achieve unprecedented scale through domain-specific hardware, standardized functionalities, and granular distribution - - Compare advantages and disadvantages of each leading hardware approach to DS Platforms - - Learn how P4 Domain-Specific Language and architecture enable high-performance, low-power ASICs that are data-plane-programmable at runtime - - Distribute cloud security services, including firewalls, encryption, key management, and VPNs - - Implement distributed storage and RDMA services in large-scale cloud networks - - Utilize Distributed Services Cards to offload networking processing from host CPUs - - Explore the newest DS Platform management architectures - Building a Future-Proof Cloud Architecture is for network, cloud, application, and storage engineers, security experts, and every technology professional who wants to succeed with tomorrow’s most advanced service architectures.

DKK 388.00
1

Hardware Architectures for Post-Quantum Digital Signature Schemes - Ramesh Karri - Bog - Springer Nature Switzerland AG - Plusbog.dk

Hardware Architectures for Post-Quantum Digital Signature Schemes - Ramesh Karri - Bog - Springer Nature Switzerland AG - Plusbog.dk

This book explores C-based design, implementation, and analysis of post-quantum cryptography (PQC) algorithms for signature generation and verification. The authors investigate NIST round 2 PQC algorithms for signature generation and signature verification from a hardware implementation perspective, especially focusing on C-based design, power-performance-area-security (PPAS) trade-offs and design flows targeting FPGAs and ASICs. Describes a comprehensive set of synthesizable c code base as well as the hardware implementations for the different types of PQC algorithms including lattice-based, code-based, and multivariate-based;Demonstrates the hardware (FPGA and ASIC) and hardware-software optimizations and trade-offs of the NIST round 2 signature-based PQC algorithms;Enables designers to build hardware implementations that are resilient to a variety of side-channels.

DKK 1113.00
1

Brain Dead - Ed Davis - Bog - Rizzoli International Publications - Plusbog.dk

Brain Dead - Ed Davis - Bog - Rizzoli International Publications - Plusbog.dk

Inspired by the natural world, sprawling subcultures, and the occasional obscure horror film, Brain Dead is exactly the opposite of what its title suggests. Alive, smart, and keeping their cult fan base guessing. In 2014 Kyle Ng and Ed Davis founded Brain Dead in sunny LA. Quickly they grew to include a global team of talented artists and designers that captivated the attention of fans worldwide. A stakeholder in the underground LA scene, Brain Dead has collaborated with names like Magic The Gathering, the Academy of Motion Picture Arts and Sciences, Marvel, and NTS Radio; brands including Reebok,Converse, A.P.C., the North Face, Asics, Dickies, Kiko Kostadinov, and Oakley. This book chronicles the formation and development of the brand as it has evolved to work with an exciting roster of artists, musicians, filmmakers, and designers. Brilliantly designed with an edge of classic underground zine culture, this volume is teeming with all of Brain Dead’s magical creations. An essential read for anyone looking for a window into a more inspired world.

DKK 468.00
1

Soled Out - Sneaker Freaker - Bog - Phaidon Press Ltd - Plusbog.dk

Soled Out - Sneaker Freaker - Bog - Phaidon Press Ltd - Plusbog.dk

''A veritable tome of sneaker history...backed by nearly a decade of research and discovery.'' - Hypebeast A riotous, 720-page celebration of sneaker culture and sporting legends, as told through the medium of vintage print advertising More than a decade in the making, Soled Out is the definitive - and only - collection of sneaker advertisements from the footwear industry''s golden age. Lovingly written and compiled by Simon ''Woody'' Wood, founder of the legendary Sneaker Freaker magazine and author of The Ultimate Sneaker Book , this colossal volume combines nearly 900 vintage images with a punchy narrative full of insider stories and historical revelations. Featuring the biggest brands, classic sneaker models, superstar athletes, and pop culture icons - from Adidas, New Balance, and Puma, to Asics, Pony, and Pro-Keds; the Nike Air Max and Converse All Star to New Balance 990 and Reebok Pump; Andre Agassi and Michael Jordan to Paula Abdul and MC Hammer - every page is laced with incredible graphics and unforgettable advertising slogans. Sit back and enjoy the spectacular scenery ahead as Soled Out powers through a 720-page marathon celebration of the rubber, leather, and mesh we wear on our feet.

DKK 450.00
1

Experiential Marketing - Rose Leahy - Bog - Sage Publications Ltd - Plusbog.dk

Experiential Marketing - Rose Leahy - Bog - Sage Publications Ltd - Plusbog.dk

At a time when brand exposure is almost limitless, and ads have become more personalized than ever before, how do brands stand out and still win your attention? Having previously struggled to assert its credibility theoretically and amongst executives, experiential marketing now forms a core feature of most marketing practices. This book resets the perspective on the experience as an effective means of achieving corporate marketing objectives in a way that is structured, purposeful and measurable. Featuring over 40 examples from brands such as Netflix, Lego, Coca Cola, Vans, Asics and Sweaty Betty, this book revisits the theory around this type of marketing and shows you how to better integrate experiential marketing with other areas of marketing communications. The implementation model provided will help you develop robust campaigns that support overall marketing objectives and provide clarity on effectiveness to executives through a mechanism called Return on Integrated Experience (ROIE). Experiential Marketing faces new challenges in a post-Covid era – this book will be the basis for overcoming those challenges and providing opportunities to marketers everywhere. Rose Leahy is a lecturer and research supervisor in the area of marketing in Munster Technological University, Ireland. Pio Fenton is Head of Department of Marketing and International Business at Munster Technologicla University, Ireland. Holly Barry is a Brand Strategist at Barry Group, a leading wholesale distribution company in Cork, Ireland.

DKK 499.00
1

Whiz Limited - Whiz Limited - Bog - Rizzoli International Publications - Plusbog.dk

Whiz Limited - Whiz Limited - Bog - Rizzoli International Publications - Plusbog.dk

The first monograph on the Japanese streetwear brand Whiz Limited, this book showcases the last 20 years of the brand’s design and collaborations with streetwear’s most iconic players. Whiz Limited is a Japanese streetwear brand estab-lished in 2000 by Hiroaki Shitano. With a following in Japan as well as Hong Kong and mainland China, Shitano has become something of a cult figure, as one of the new generation of streetwear designers influ-enced by Hiroshi Fujiwara. Consisting originally of handmade, printed tees, the label has since expanded to include a complete range of streetwear infused with an eccentric Japanese flair. Shitano was raised in the entertainment district of Shinjuku, and this is reflected in the clothing’s distinctly downtown urban vibe and predominantly dark color palette. Chronicling the history of the brand, alongside some of Whiz’s most prolific projects to date, this book features beautiful, newly shot photographs of a long list of collaborations with streetwear icons, including Hiroshi Fujiwara/Fragment, Mastermind, Stüssy, A Bathing Ape®, Bristol, Bountyhunter, M&M, Kappa, New Era, Disney, Hello Kitty, G-Shock, Peanuts, Porter, The North Face, Marmot, First Down, and the estate of Keith Haring. This book also features an impressive archive of the brand’s iconic sneaker designs, boasting collabora-tions with heavy hitters like mita sneakers, Adidas, New Balance, Asics, Puma, Reebok, Mizuno, Converse, and Ugg, making it a must-have for sneak-erheads and lovers of streetwear style alike.

DKK 306.00
1

Data Parallel C++ - James Reinders - Bog - APress - Plusbog.dk

Data Parallel C++ - James Reinders - Bog - APress - Plusbog.dk

"This book, now in is second edition, is the premier resource to learn SYCL 2020 and is the ONLY book you need to become part of this community." Erik Lindahl, GROMACS and Stockholm UniversityLearn how to accelerate C++ programs using data parallelism and SYCL. This open access book enables C++ programmers to be at the forefront of this exciting and important development that is helping to push computing to new levels. This updated second edition is full of practical advice, detailed explanations, and code examples to illustrate key topics. SYCL enables access to parallel resources in modern accelerated heterogeneous systems. Now, a single C++ application can use any combination of devices–including GPUs, CPUs, FPGAs, and ASICs–that are suitable to the problems at hand. This book teaches data-parallel programming using C++ with SYCL and walks through everything needed to program accelerated systems. The book begins by introducing data parallelism and foundational topics for effective use of SYCL. Later chapters cover advanced topics, including error handling, hardware-specific programming, communication and synchronization, and memory model considerations. All source code for the examples used in this book is freely available on GitHub. The examples are written in modern SYCL and are regularly updated to ensure compatibility with multiple compilers. What You Will Learn Accelerate C++ programs using data-parallel programmingUse SYCL and C++ compilers that support SYCLWrite portable code for accelerators that is vendor and device agnosticOptimize code to improve performance for specific acceleratorsBe poised to benefit as new accelerators appear from many vendorsWho This Book Is For New data-parallel programming and computer programmers interested in data-parallel programming using C++This is an open access book.

DKK 415.00
1

Autonomic Networking-on-Chip - - Bog - Taylor & Francis Ltd - Plusbog.dk

Autonomic Networking-on-Chip - - Bog - Taylor & Francis Ltd - Plusbog.dk

Despite the growing mainstream importance and unique advantages of autonomic networking-on-chip (ANoC) technology, Autonomic Networking-On-Chip: Bio-Inspired Specification, Development, and Verification is among the first books to evaluate research results on formalizing this emerging NoC paradigm, which was inspired by the human nervous system. The FIRST Book to Assess Research Results, Opportunities, & Trends in "BioChipNets" The third book in the Embedded Multi-Core Systems series from CRC Press, this is an advanced technical guide and reference composed of contributions from prominent researchers in industry and academia around the world. A response to the critical need for a global information exchange and dialogue, it is written for engineers, scientists, practitioners, and other researchers who have a basic understanding of NoC and are now ready to learn how to specify, develop, and verify ANoC using rigorous approaches. Offers Expert Insights Into Technical Topics Including: Bio-inspired NoC - - How to map applications onto ANoC - - ANoC for FPGAs and structured ASICs - - Methods to apply formal methods in ANoC development - - Ways to formalize languages that enable ANoC - - Methods to validate and verify techniques for ANoC - - Use of "self-" processes in ANoC (self-organization, configuration, healing, optimization, protection, etc.) - - Use of calculi for reasoning about context awareness and programming models in ANoC - With illustrative figures to simplify contents and enhance understanding, this resource contains original, peer-reviewed chapters reporting on new developments and opportunities, emerging trends, and open research problems of interest to both the autonomic computing and network-on-chip communities. Coverage includes state-of-the-art ANoC architectures, protocols, technologies, and applications. This volume thoroughly explores the theory behind ANoC to illustrate strategies that enable readers to use formal ANoC methods yet still make sound judgments and allow for reasonable justifications in practice.

DKK 745.00
1

Reuse Methodology Manual for System-On-A-Chip Designs - Pierre Bricaud - Bog - Springer-Verlag New York Inc. - Plusbog.dk

Reuse Methodology Manual for System-On-A-Chip Designs - Pierre Bricaud - Bog - Springer-Verlag New York Inc. - Plusbog.dk

Silicon technology now allows us to build chips consisting of tens of millions of transistors. This technology promises new levels of system integration onto a single chip, but also presents significant challenges to the chip designer. As a result, many ASIC developers and silicon vendors are re-examining their design methodologies, searching for ways to make effective use of the huge numbers of gates now available. These designers see current design tools and methodologies as inadequate for developing million-gate ASICs from scratch. There is considerable pressure to keep design team size and design schedules constant while design complexities grow. Tools are not providing the productivity gains required to keep pace with the increasing gate counts available from deep submicron technology. Design reuse - the use of pre-designed and pre-verified cores - is the most promising opportunity to bridge the gap between available gate-count and designer productivity. Reuse Methodology Manual for System-On-A-Chip Designs outlines an effective methodology for creating reusable designs for use in a System-on-a-Chip (SoC) design methodology. Silicon and tool technologies move so quickly that no single methodology can provide a permanent solution to this highly dynamic problem. Instead, this manual is an attempt to capture and incrementally improve on current best practices in the industry, and to give a coherent, integrated view of the design process. From the Foreword ` Synopsys and Mentor Graphics have joined forces to help make IP reuse a reality. One of the goals of our Design Reuse Partnership is to develop, demonstrate, and document a reuse-based design methodology that works. The Reuse Manual (RMM) is the result of this effort. '' Aart J. de Geus, Synopsys, Inc. Walden C. Rhines, Mentor Graphics Corporation

DKK 663.00
1

Electronic System-Level HW/SW Co-Design of Heterogeneous Multi-Processor Embedded Systems - Luigi Pomante - Bog - River Publishers - Plusbog.dk

Electronic System-Level HW/SW Co-Design of Heterogeneous Multi-Processor Embedded Systems - Luigi Pomante - Bog - River Publishers - Plusbog.dk

Modern electronic systems consist of a fairly heterogeneous set of components. Today, a single system can be constituted by a hardware platform, frequently composed of a mix of analog and digital components, and by several software application layers. The hardware can include several heterogeneous microprocessors (e.g. GPP, DSP, GPU, etc.), dedicated ICs (ASICs and/or FPGAs), memories, a set of local connections between the system components, and some interfaces between the system and the environment (sensors, actuators, etc.). Therefore, on the one hand, multi-processor embedded systems are capable of meeting the demand of processing power and flexibility of complex applications. On the other hand, such systems are very complex to design and optimize, so that the design methodology plays a major role in determining the success of the products. For these reasons, to cope with the increasing system complexity, the approaches typically used today are oriented towards co-design methodologies working at the higher levels of abstraction. Unfortunately, such methodologies are typically customized for the specific application, suffer of a lack of generality and still need a considerable effort when real-size project are envisioned. Therefore, there is still the need for a general methodology able to support the designer during the high-level steps of a co-design flow, enabling an effective design space exploration before tackling the low-level steps and thus committing to the final technology. This should prevent costly redesign loops.In such a context, the work described in this book, composed of two parts, aims at providing models, methodologies and tools to support each step of the co-design flow of embedded systems implemented by exploiting heterogeneous multi-processor architectures mapped on distributed systems, as well as fully integrated onto a single chip.

DKK 357.00
1

Electronic System-Level HW/SW Co-Design of Heterogeneous Multi-Processor Embedded Systems - Luigi Pomante - Bog - River Publishers - Plusbog.dk

Electronic System-Level HW/SW Co-Design of Heterogeneous Multi-Processor Embedded Systems - Luigi Pomante - Bog - River Publishers - Plusbog.dk

Modern electronic systems consist of a fairly heterogeneous set of components. Today, a single system can be constituted by a hardware platform, frequently composed of a mix of analog and digital components, and by several software application layers. The hardware can include several heterogeneous microprocessors (e.g. GPP, DSP, GPU, etc.), dedicated ICs (ASICs and/or FPGAs), memories, a set of local connections between the system components, and some interfaces between the system and the environment (sensors, actuators, etc.). Therefore, on the one hand, multi-processor embedded systems are capable of meeting the demand of processing power and flexibility of complex applications. On the other hand, such systems are very complex to design and optimize, so that the design methodology plays a major role in determining the success of the products. For these reasons, to cope with the increasing system complexity, the approaches typically used today are oriented towards co-design methodologies working at the higher levels of abstraction. Unfortunately, such methodologies are typically customized for the specific application, suffer of a lack of generality and still need a considerable effort when real-size project are envisioned. Therefore, there is still the need for a general methodology able to support the designer during the high-level steps of a co-design flow, enabling an effective design space exploration before tackling the low-level steps and thus committing to the final technology. This should prevent costly redesign loops.In such a context, the work described in this book, composed of two parts, aims at providing models, methodologies and tools to support each step of the co-design flow of embedded systems implemented by exploiting heterogeneous multi-processor architectures mapped on distributed systems, as well as fully integrated onto a single chip.

DKK 778.00
1

High Performance Computing for Big Data - - Bog - Taylor & Francis Inc - Plusbog.dk

High Performance Computing for Big Data - - Bog - Taylor & Francis Inc - Plusbog.dk

High-Performance Computing for Big Data: Methodologies and Applications explores emerging high-performance architectures for data-intensive applications, novel efficient analytical strategies to boost data processing, and cutting-edge applications in diverse fields, such as machine learning, life science, neural networks, and neuromorphic engineering. The book is organized into two main sections. The first section covers Big Data architectures, including cloud computing systems, and heterogeneous accelerators. It also covers emerging 3D IC design principles for memory architectures and devices. The second section of the book illustrates emerging and practical applications of Big Data across several domains, including bioinformatics, deep learning, and neuromorphic engineering. Features Covers a wide range of Big Data architectures, including distributed systems like Hadoop/Spark Includes accelerator-based approaches for big data applications such as GPU-based acceleration techniques, and hardware acceleration such as FPGA/CGRA/ASICs Presents emerging memory architectures and devices such as NVM, STT- RAM, 3D IC design principles Describes advanced algorithms for different big data application domains Illustrates novel analytics techniques for Big Data applications, scheduling, mapping, and partitioning methodologies Featuring contributions from leading experts, this book presents state-of-the-art research on the methodologies and applications of high-performance computing for big data applications. About the Editor Dr. Chao Wang is an Associate Professor in the School of Computer Science at the University of Science and Technology of China. He is the Associate Editor of ACM Transactions on Design Automations for Electronics Systems (TODAES), Applied Soft Computing, Microprocessors and Microsystems, IET Computers & Digital Techniques, and International Journal of Electronics. Dr. Chao Wang was the recipient of Youth Innovation Promotion Association, CAS, ACM China Rising Star Honorable Mention (2016), and best IP nomination of DATE 2015. He is now on the CCF Technical Committee on Computer Architecture, CCF Task Force on Formal Methods. He is a Senior Member of IEEE, Senior Member of CCF, and a Senior Member of ACM.

DKK 1042.00
1

High Performance Computing for Big Data - - Bog - Taylor & Francis Ltd - Plusbog.dk

High Performance Computing for Big Data - - Bog - Taylor & Francis Ltd - Plusbog.dk

High-Performance Computing for Big Data: Methodologies and Applications explores emerging high-performance architectures for data-intensive applications, novel efficient analytical strategies to boost data processing, and cutting-edge applications in diverse fields, such as machine learning, life science, neural networks, and neuromorphic engineering. The book is organized into two main sections. The first section covers Big Data architectures, including cloud computing systems, and heterogeneous accelerators. It also covers emerging 3D IC design principles for memory architectures and devices. The second section of the book illustrates emerging and practical applications of Big Data across several domains, including bioinformatics, deep learning, and neuromorphic engineering. Features Covers a wide range of Big Data architectures, including distributed systems like Hadoop/Spark Includes accelerator-based approaches for big data applications such as GPU-based acceleration techniques, and hardware acceleration such as FPGA/CGRA/ASICs Presents emerging memory architectures and devices such as NVM, STT- RAM, 3D IC design principles Describes advanced algorithms for different big data application domains Illustrates novel analytics techniques for Big Data applications, scheduling, mapping, and partitioning methodologies Featuring contributions from leading experts, this book presents state-of-the-art research on the methodologies and applications of high-performance computing for big data applications. About the Editor Dr. Chao Wang is an Associate Professor in the School of Computer Science at the University of Science and Technology of China. He is the Associate Editor of ACM Transactions on Design Automations for Electronics Systems (TODAES), Applied Soft Computing, Microprocessors and Microsystems, IET Computers & Digital Techniques, and International Journal of Electronics. Dr. Chao Wang was the recipient of Youth Innovation Promotion Association, CAS, ACM China Rising Star Honorable Mention (2016), and best IP nomination of DATE 2015. He is now on the CCF Technical Committee on Computer Architecture, CCF Task Force on Formal Methods. He is a Senior Member of IEEE, Senior Member of CCF, and a Senior Member of ACM.

DKK 468.00
1

Industry 4.0, China 2025, IoT - Wolfgang Babel - Bog - Springer - Plusbog.dk

Industry 4.0, China 2025, IoT - Wolfgang Babel - Bog - Springer - Plusbog.dk

The book gives an overview about automation technology over the last 50 years, based on my own experiences. It is a good summery for automation since 1970 for all who want to know about the context of automation developments and their standards. It is a fundamental summery and enables the reader to get experience in the complex field of automation. In detail the question is arised, whether Industry 4.0, China 2025, IoT, AI are a revolution or more an evolution of timewise established availbale technologies in HW, SW and algorithms. Is the hype about Industry 4.0 justified or not?In that context a timelline since 1970 ist shown for AI, ANN, essential milestones in automation, e.g OSI-model, automation pyramid, standards for bus systems, main SW-languages, robots, AI, ANN, pattern recognittion, Ethernet, the 12 most important international field busses, their main features and characterisitcs, foundation of committees, harmonization and standardization efforts, OPC UA and cloud computing, field devices, PLCs, SCADA, MES, ERP and automation history. All that history is seen in the context of µ-controller, DSP (Digital signal processor), FPGAs (Field Programmable Gate Arrays), ASICs (Application-Specific Integrated Circuit) , Chip on Board. It is include the HW-history, from Intel 8080 to octuple multicore processors. In the same way it is shown the history of field device out from laboratory into the field with all difficulties and benefits of that transition. The issues are summerized in a pyramid of complexity. Requirements for robustness and safety are shown for field devices. In the same way it is shown the development of mainframes, workstations and PC’s. SAP a leading ERP System is explained in mor detail. Specially it is figured out how SAP works and what has to be considered in working with such kind of system. The differences between MES- and ERP-systems are discussed, specially also for future combined SAP/MES systems. Explained are the problems of middlesized companies (SMEs) in dealing with Industry 4.0 and automation. Further examples are given and discussed for automized quality control in automotvie, PCB-handling, CIGS (Solar cell)-production. Also shown is the upgrade for older products and make them ready for automation standards. In detail the history oft he modern robotics is shown for the automotive industry. In summery also is figured out the Industry 5.0 which is just coming up more and more.

DKK 986.00
1